Research Seminar - August 06, 1999

Abstract

Minimum Distance Block Matching (MDBM) is the most time consuming step in the MPEG1 compression algorithm. For viseo compression, this step has to be completed within the time of one video frame. This is one reason why, up until now, video compression cameras remain very expensive and rather bulky in size. In commercial products, this is usually solved by high-speed signal processors.

While general purpose processors are usually cost effective (due to mass production), often they cannot solve a real-time problem with optimal size and power. For the above, a dedicated use, special processor should be designed to optimise the speed, area, and power. First, I present a review of the design of specialised hardware for solving the MBM problem, incluing early applications of the linear systolic array. In fact, the simple linear systolic array was concluded to be not suitable for such an application. My work in Korea involved the redesign of an improved linear systolic array incorporating a small amount of local storage. By folding the search algorithm and searching in a deterministic sequence, we can produce a linear systolic array to solve the above problem with extremely high area efficiency. While power usage is (estimated) to be similar to the best achievable so far, this architecture is very flexible and extensible to applications of different size. Together with the team in KAIST, an 8-PE array was designed using VHDL targeting custom CMOS chip as well as FPGA. For 0.25 micron CMOS technology, the size was estimated to be 9 square mm. Functional tests may be performed in a FPGA.